Researchers from Hong Kong University of Science and Technology have developed a novel integration scheme

It is reported that researchers from Hong Kong University of Science and Technology have recently developed a novel integration scheme to effectively couple III-V compound semiconductor devices and silicon modules on the Si photonics platform through selective direct epitaxy.

Research from Hong Kong University of Science and Technology: High performance silicon waveguide coupled III-V photodetector grown on SOI.

In the past few years, data traffic has grown exponentially, and the resulting applications and emerging technologies in big data, cars, cloud applications and sensors have been constantly promoted. In order to realize, expand and increase data transmission through energy-saving, high-capacity and low-cost optical interconnection. Silicon photonics is widely studied as a core technology.

Figure 2 (a) defines the silicon segment for III-V family growth and silicon waveguide patterning. (b) LTO deposition and high temperature annealing. (c) An oxide opening is generated during epitaxy to allow sufficient gas diffusion. (d) Si is selectively wet etched to form side grooves. (e) The patterned SOI has a 7 μ m wide transverse groove for growth of III-V materials, and the long Si segment is used for waveguide definition. (f) Top view of the coupling scheme using direct butt coupling and silicon back taper. (g) The simulated coupling efficiency between the Si waveguide and the III-V family photodetectors is used to design the coupling scheme with and without Si anti taper. Taper length, 100 μ m; Tip width, 150 nm; Waveguide thickness, 480 nm; Waveguide width, 500 nm.

The Hong Kong University of Science and Technology has studied III-V lasers and photodetectors on silicon through two main methods. Although it provides a solution with lower cost, greater scalability and higher integration density, the micrometer III-V buffer layer, which is crucial to this method, hinders the efficient optical coupling between III-V family and silicon.

In order to solve these problems, a team led by Professor Qimei Liu, emeritus professor of the Department of Electronic and Computer Engineering of the Hong Kong University of Science and Technology (HKUST), developed Lateral Aspect Ratio Capture (LART), which is a novel selective direct epitaxy method that can selectively grow III-V materials on silicon on insulator (SOI) without thick buffer solution.

Fig. 3 (a) Color enhanced cross section SEM image of transverse p-i-n structure grown on SOI. (b) – (f) Color enhanced optical image of growing p-i-n structure, III-V length is (b) 5.0 μ m，（c）2.0 μ m，（d）1.0 μ M and (e) 0.5 μ m。 (f) From 5.0 μ The room temperature PL of InGaAs measured by m length photodetectors.

Based on this new technology, the team designed and demonstrated the unique in-plane integration of III-V family photodetectors and silicon components. The coupling efficiency between III-V family and silicon is very high. Compared with commercial photodetectors, the photodetector of this method has smaller performance, higher sensitivity, wider working range, and a record high speed of more than 112 Gb/s, much faster than existing products.

Fig. 4 (a) Top view optical image of finished silicon waveguide integrated photodetector, including III-V PD, tapered silicon waveguide and edge coupler. (b) Top view SEM image showing the coupling of Si waveguide and III-V PD in the same plane. (c) – (e) The image of the tapered silicon waveguide in the area (c) narrowest, (d) middle and (e) widest. (f) The side view SEM images of the waveguide show smooth sidewalls. (g) Top view optical image of the edge coupler for coupling between optical fiber and device on chip.

"This is thanks to our newly developed new growth technology called Lateral Aspect Ratio Capture (LART) and our unique coupling strategy design on the SOI platform. Our team's comprehensive expertise and insights in device physics and growth mechanism enable us to complete the challenging task of effective coupling between III-V family and Si, as well as cross correlation analysis of epitaxial growth and device performance.

"This work will provide a practical solution for photonic integrated circuits and fully integrated Si photonics. Optical coupling between III-V lasers and Si modules can be achieved by this method," said Dr. Ying Xue, the first author of the study.

This work was recently published on Optica.

Source:High-speed and low dark current silicon-waveguide-coupled III-V photodetectors selectively grown on SOI, Optica (2022). DOI: 10.1364/OPTICA.468129